DEVICE FABRICATION TECHNOLOGY 
Updated 05/06/03

  • 3" & 4" process line with 120 wafers/month capacity (single shift).


  • Advanced MBE wafers designed for low noise, low distortion, high efficiency and high reliability (GaAs, AlGaAs/GaAs, AlGaAs/InGaAs) .


  • N+ and RTP alloying for better ohmic and reliability.


  • Self-aligned double recessed gate for power FETs and single recessed gate for low noise and high gain FETs.


  • 0.25 to 0.5 um mushroom gate (with large 1.5um top cross-section) .


  • 0.7 um thick Ti/Pt/Au gate and 1st metal metallizations.


  • PECVD Si3N4 for passivation and MIM capacitors.


  • GaAs epi and NiCr resistors.


  • 2.5 um thick Gold plated air bridge, transmission lines and bonding pads.


  • Backside Gold plated 1 mil heat sink (PHS) with 1 mil GaAs for high power FETs.


  • Backside via-hole process for FETs and MMICs.


  • 100% automatic D.C. testing with Idss binning.


  • Serialization number on every device.


  • On wafer RF test for MMICs.
 
Excelics Semiconductor, Inc.
310 De Guigne Dr.
Sunnyvale, CA  94085
Phone: (408) 737-1711    Fax:  (408) 737-1868
Web Site:  http://www.excelics.com
Email: sales@excelics.com